On Tue, Jan 13, 2015 at 01:41:03PM +0000, Peter Maydell wrote: > On 13 January 2015 at 13:35, Christoffer Dall > <christoffer.dall@xxxxxxxxxx> wrote: > > Wouldn't a guest (and I believe Linux does this) reserve ASID 0 for > > additional cores and use ASID 1+++ for itself? > > If the guest reserves an ASID for "MMU disabled" then yes, that would > work. The question of course is whether all guests do that... > which ASID would match for MMU disabled? Did you come across that in the ARM ARM somewhere? The fact that Linux does it would indicate that this may be a requirement on real hardware too and therefore all guests have to do it... -Christoffer _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
