On 11 January 2015 at 12:33, Christoffer Dall <christoffer.dall@xxxxxxxxxx> wrote: > On Fri, Jan 09, 2015 at 03:28:58PM +0000, Peter Maydell wrote: >> But implementations are allowed to hit in the cache even >> when the cache is disabled. In particular, setting the guest > > But how can it hit anything when the icache for the used VMID is > guaranteed to be clear (maybe that requires another full icache > invalidate for that VMID for PSCI reset)? The point is that at the moment we don't do anything to guarantee that we've cleared the icache. (Plus could there be stale data in the icache for this physical CPU for this VMID because we've run some other vCPU on it? Or does the process of rescheduling vCPUs across pCPUs and guest ASID management deal with that?) You probably want to clear the icache on vcpu (re-)init rather than reset, though (no guarantee that userspace is going to handle system resets via PSCI). -- PMM _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
