On 14 October 2014 08:21, Victor Kamensky <victor.kamensky@xxxxxxxxxx> wrote: > On 14 October 2014 02:47, Marc Zyngier <marc.zyngier@xxxxxxx> wrote: >> On Sun, Sep 28 2014 at 03:04:26 PM, Christoffer Dall <christoffer.dall@xxxxxxxxxx> wrote: >>> The EIRSR and ELRSR registers are 32-bit registers on GICv2, and we >>> store these as an array of two such registers on the vgic vcpu struct. >>> However, we access them as a single 64-bit value or as a bitmap pointer >>> in the generic vgic code, which breaks BE support. >>> >>> Instead, store them as u64 values on the vgic structure and do the >>> word-swapping in the assembly code, which already handles the byte order >>> for BE systems. >>> >>> Signed-off-by: Christoffer Dall <christoffer.dall@xxxxxxxxxx> >> >> (still going through my email backlog, hence the delay). >> >> This looks like a valuable fix. Haven't had a chance to try it (no BE >> setup at hand) but maybe Victor can help reproducing this?. > > I'll give it a spin. Tested-by: Victor Kamensky <victor.kamensky@xxxxxxxxxx> Tested on v3.17 + this fix on TC2 (V7) and Mustang (V8) with BE kvm host, tried different combination of guests BE/LE V7/V8. All looks good. Only with latest qemu in BE V8 mode in v3.17 without this fix I was able to reproduce the issue that Will spotted. With kvmtool, and older qemu V8 BE code never hit vgic_v2_set_lr function so that is why we did not run into it before. I guess fix in qemu in pl011 mentioned by 1f2bb4acc125, uncovered vgic_v2_set_lr code path and this BE issue. With this patch it works fine now. Thanks, Victor > Thanks, > Victor > >> Acked-by: Marc Zyngier <marc.zyngier@xxxxxxx> >> >> M. >> -- >> Jazz is not dead. It just smells funny. >> _______________________________________________ >> kvmarm mailing list >> kvmarm@xxxxxxxxxxxxxxxxxxxxx >> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
