+ if (resource_size(&cpu_res) >= SZ_8K) + supports_deactivate = true; + else + pr_warn("GIC: CPU interface size is %x, DT is probably wrong\n", (int)resource_size(&cpu_res));This will not work on APM X-Gene because, for X-Gene first CPU page is at 0x78020000 and second CPU page is at 0x78030000. Ian had send-out a patch long time back to extend GIC dt-bindings for addressing this issue. (http://www.spinics.net/lists/arm-kernel/msg283767.html)
We have a similar issue with an AMD SOC. You can add 0xf000 (60K) page offset to it to cleverly work around the issue but it seems quite likely that the page offset has to be communicated to userspace and handled there at no small effort.
Anybody want to revive Ian's split patches? They do seem convoluted but seem like they might work as an approach.
-Joel _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
