On 28/05/14 15:09, Christoffer Dall wrote: > On Wed, May 28, 2014 at 06:56:44AM -0700, Victor Kamensky wrote: >> On 28 May 2014 02:14, Christoffer Dall <christoffer.dall@xxxxxxxxxx> wrote: >> >> They cannot be separate it is the same data with two ways >> to access: as 64bit value or low word 32bit value. Typically it is LPAE >> cp15 memory related registers like TTBR0, as in mcrr, mcr example >> in my previous response. mcrr will update high and low word values >> of TTBR0, mcr will update only low word of it. >> > You just have to decide whether you want to represent a 64-bit register as > a concatenation of two u32's or a 32-bit register access as a part > of the 64-bit register value. > > I think the architecture, at least for 32-bit register views on ARMv8, > defines the 32-bit accesses as a view on the 64-bit register. Indeed, and that's how KVM implements it. > You should of course only store those registers once, but instead of > storing them in an array of u32's you could store the 64-bit wide > registers in a separate array of u64's. 32-bit accesses to those > registers would look in the array of u64's for such a value. > > I didn't try it out, so not sure how it looks like, just saying it's an > option worth considering. I think that's the best idea so far. If the access is 64bit, use the 64bit version of the union (going through the corresponding vcpu_sys_reg() interface). This should be a very minimal refactor. M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
