On Fri, Feb 07, 2014 at 10:27:35AM +0000, Peter Maydell wrote: > On 7 February 2014 07:35, Hu Tao <hutao@xxxxxxxxxxxxxx> wrote: > > On Fri, Jan 31, 2014 at 03:45:27PM +0000, Peter Maydell wrote: > >> Make the cache ID system registers (CLIDR, CCSELR, CCSIDR, CTR) > > > > s/CCSELR/CSSELR/ > > > >> visible to AArch64. These are mostly simple 64-bit extensions of the > >> existing 32 bit system registers and so can share reginfo definitions. > > > > According to the document(ARM DDI 0487A.a), some AArch64 system > > registers are 32-bit, for example CCSIDR_EL1 is 32-bit. But System_Put() > > and System_Get() writes/reads 64-bit values, which makes me confused. > > We've been round this issue before. The documentation > uses "32-bit" as a shorthand for "64 bit but the top > 32 bits are RES0". There is no way in AArch64 to do a > 32 bit read or write of a system register -- the only > instructions are MSR/MRS, which are always 64 bits. > Similarly, the KVM kernel API exposes all registers as > 64 bits wide. Thanks for the explanation! -- Regards, Hu Tao _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
