This is the fourth set of A64 Neon support patches. This set provides complete implementations of the categories: * scalar x indexed * vector x indexed * scalar three-different and fills in all the previously missing instructions in: * vector 3-reg-same * scalar 3-reg-same It includes adding support in softfloat for "fused multiply, add and then divide by two", because the A64 VRECPS instruction requires it. By my reckoning the parts that are still missing for Neon are: * parts of scalar shift-immediate and vector shift-immediate * parts of scalar-2-misc * most of vector-3-diff * parts of vector-2-misc Alex Bennée (2): target-arm: A64: Implement SIMD FP compare and set insns target-arm: A64: Implement floating point pairwise insns Peter Maydell (6): target-arm: A64: Implement plain vector SIMD indexed element insns target-arm: A64: Implement long vector x indexed insns target-arm: A64: Implement SIMD scalar indexed instructions target-arm: A64: Implement scalar three different instructions softfloat: Support halving the result of muladd operation target-arm: A64: Implement remaining 3-same instructions fpu/softfloat.c | 38 ++ include/fpu/softfloat.h | 3 + target-arm/helper-a64.c | 105 +++++ target-arm/helper-a64.h | 9 + target-arm/helper.h | 2 + target-arm/neon_helper.c | 16 + target-arm/translate-a64.c | 936 +++++++++++++++++++++++++++++++++++++++++---- 7 files changed, 1033 insertions(+), 76 deletions(-) -- 1.8.5 _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
