On 4 January 2014 02:34, Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx> wrote:
> On Mon, Dec 23, 2013 at 8:49 AM, Peter Maydell <peter.maydell@xxxxxxxxxx> wrote:
>> +static const ARMCPRegInfo v8_cp_reginfo[] = {
>> + /* Minimal set of EL0-visible registers. This will need to be expanded
>> + * significantly for system emulation of AArch64 CPUs.
>> + */
>> + { .name = "NZCV", .state = ARM_CP_STATE_AA64,
>> + .opc0 = 3, .opc1 = 3, .opc2 = 0, .crn = 4, .crm = 2,
>> + .access = PL0_RW, .type = ARM_CP_NZCV },
>> + {. name = "FPCR", .state = ARM_CP_STATE_AA64,
>> + .opc0 = 3, .opc1 = 3, .opc2 = 0, .crn = 4, .crm = 4,
>> + .access = PL0_RW, .readfn = aa64_fpcr_read, .writefn = aa64_fpcr_write },
>
> Indentation and spacing looks inconsistent.
So it does (I didn't even know it was syntactically valid to leave
a space after the '.' like that...) . Will fix.
Do you mind if I don't do a respin just for this?
thanks
-- PMM
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