On 19 December 2013 20:53, Richard Henderson <rth@xxxxxxxxxxx> wrote: > On 12/17/2013 07:12 AM, Peter Maydell wrote: >> - uint32_t c13_tls1; /* User RW Thread register. */ >> - uint32_t c13_tls2; /* User RO Thread register. */ >> - uint32_t c13_tls3; /* Privileged Thread register. */ >> + uint64_t tpidr_el0; /* User RW Thread register. */ >> + uint64_t tpidrro_el0; /* User RO Thread register. */ >> + uint64_t tpidr_el1; /* Privileged Thread register. */ > > Not target_ulong, continuing to use 32bit slot for pure AA32? It would only be a 32 bit slot for the 32 bit cores in qemu-arm; the same cores in qemu-aarch64 would be 64 bits. I think I'd rather have the consistency (and the ability to migrate between a qemu-arm cortex-a9 and a qemu-aarch64 cortex-a9 doesn't hurt). thanks -- PMM _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
