Re: [PATCH 07/12] target-arm: A64: expand decoding skeleton for system instructions

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On 12/04/2013 10:51 AM, Peter Maydell wrote:
> From: Claudio Fontana <claudio.fontana@xxxxxxxxxx>
> 
> Decode the various kinds of system instructions:
>  hints (HINT), which include NOP, YIELD, WFE, WFI, SEV, SEL
>  sync instructions, which include CLREX, DSB, DMB, ISB
>  msr_i, which move immediate to processor state field
>  sys, which include all SYS and SYSL instructions
>  msr, which move from a gp register to a system register
>  mrs, which move from a system register to a gp register
> 
> Provide implementations where they are trivial nops.
> 
> Signed-off-by: Claudio Fontana <claudio.fontana@xxxxxxxxxx>
> Signed-off-by: Peter Maydell <peter.maydell@xxxxxxxxxx>
> ---
>  target-arm/translate-a64.c |  130 +++++++++++++++++++++++++++++++++++++++++++-


Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>


r~

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