On 5 August 2013 13:37, Anup Patel <anup@xxxxxxxxxxxxxx> wrote:
> On Mon, Aug 5, 2013 at 5:58 PM, Peter Maydell <peter.maydell@xxxxxxxxxx> wrote:
>> I really don't want to eat 2MB for each virtio-mmio transport
>> in a 32 bit address space, it seems hugely wasteful unless
>> there's a good reason to do it.
>
> I am not suggesting to give 2MB space to each virtio-mmio transport.
>
> What I really meant was to start VIRT_MMIO space (where all the
> virtio-mmio transport would be added) to start at 2MB aligned address
> and have total size (include all virtio-mmio transports) to be in-multiple
> of 2MB so that we can trap access to all virtio-mmio transports using
> 1-2 2MB entries in Stage2.
Yes, that's fine. That would give us:
static const MemMapEntry a15memmap[] = {
[VIRT_FLASH] = { 0, 0x1000000 },
[VIRT_CPUPERIPHS] = { 0x1000000, 0x8000 },
/* GIC distributor and CPU interfaces sit inside the CPU peripheral space */
[VIRT_GIC_DIST] = { 0x1001000, 0x1000 },
[VIRT_GIC_CPU] = { 0x1002000, 0x1000 },
[VIRT_MMIO] = { 0x1200000, 0x200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_MEM] = { 0x8000000, 30ULL * 1024 * 1024 * 1024 },
};
-- PMM
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