On 3 July 2013 09:42, Anup Patel <anup.patel@xxxxxxxxxx> wrote:
> Update kvm_target_cpu() to allow Cortex-A57 guest CPU on APM X-Gene.
>
> Signed-off-by: Anup Patel <anup.patel@xxxxxxxxxx>
> Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@xxxxxxxxxx>
> ---
> arch/arm64/kvm/guest.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
> index 2c3ff67..765f56f 100644
> --- a/arch/arm64/kvm/guest.c
> +++ b/arch/arm64/kvm/guest.c
> @@ -207,8 +207,13 @@ int __attribute_const__ kvm_target_cpu(void)
> unsigned long implementor = read_cpuid_implementor();
> unsigned long part_number = read_cpuid_part_number();
>
> - if (implementor != ARM_CPU_IMP_ARM)
> - return -EINVAL;
> + switch (implementor) {
> + case ARM_CPU_IMP_ARM:
> + case ARM_CPU_IMP_APM:
> + break;
> + default:
> + return -EINVAL;
> + }
Doesn't this change mean we now accept the below part
numbers for all implementors? That doesn't look right.
> switch (part_number) {
> case ARM_CPU_PART_AEM_V8:
> @@ -216,6 +221,7 @@ int __attribute_const__ kvm_target_cpu(void)
> case ARM_CPU_PART_FOUNDATION:
> return KVM_ARM_TARGET_FOUNDATION_V8;
> case ARM_CPU_PART_CORTEX_A57:
> + case APM_CPU_PART_POTENZA:
> /* Currently handled by the generic backend */
> return KVM_ARM_TARGET_CORTEX_A57;
> default:
Do we really model all the system registers and so on correctly
sufficiently to be able to present the guest with an A57 vcpu
on an APM X-Gene host? (ie without accidentally leaking the
host ID registers/system registers/impdef registers to the
guest).
thanks
-- PMM
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