On 29 June 2013 21:21, Peter Maydell <peter.maydell@xxxxxxxxxx> wrote: > On 28 June 2013 13:11, Mian M. Hamayun <m.hamayun@xxxxxxxxxxxxxxxxxxxxxx> wrote: > > From: "Mian M. Hamayun" <m.hamayun@xxxxxxxxxxxxxxxxxxxxxx> > > > > The vexpress model for A57 is based on the A15 machine model with a few > > changes in the daughterboard initialization (using a subset of A15 > > functionality). The A57 daughterboard init also shares the A15MPCore > > private memory region with A15 daughterboard init function. > > So, which documentation or TRM or hardware are you basing this > definition of an A57 Versatile Express daughterboard on? Currently there is no existing hardware that I am aware of, or a public TRM describing it. On existing ARMv8 models the peripherals used and the platform memory map seems to be identical with the previous iteration. Based on that, the same approach was followed to have a working setup, on which to base further development when another target is available. _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
