On 28 June 2013 13:11, Mian M. Hamayun <m.hamayun@xxxxxxxxxxxxxxxxxxxxxx> wrote: > From: Alexander Spyridakis <a.spyridakis@xxxxxxxxxxxxxxxxxxxxxx> > > AArch64 uses a cpu-release-addr memory location (defined in the dts) as > a way to inform secondary CPUs where to jump to and enter their holding > pen. Inject a very simple bootloader that polls this memory location, > until the primary CPU sets it to the right address. This and the previous patch are a bit heavy on the #ifdef TARGET_AARCH64. I suspect the code could be restructured better to avoid that. thanks -- PMM _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm