On 15 April 2013 16:26, Andre Przywara <andre.przywara@xxxxxxxxxx> wrote: > Mmh, still thinking about a nice way to get some information out of HYP mode. schedule_delayed_work() to monitor a memory address didn't work (too early?). > > But meanwhile I compared the A7 and A15 TRM 4.3.32 HSCTLR: > Bit 21 is fixed 0 on A15, but fixed 1 on A7. > Can someone confirm that this is not a typo? The HSCTLR value, seemed sane for all cores and it was fixed (read HSCTLR and SCTLR, ORs some bits and updates HSCTLR). If I remember correctly, at the time I was testing it, all cores reported the same value for SCTLR but in the case of the 3rd A7 it would crash as soon as it would try to write on HSCTLR. If you want to continue execution remove one of the isbs, of course the 3rd A7 will immediately hang when you try to run a guest (the rest of the cores will operate normally even when running a guest on them). Regards. _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
