On Sat, 12 Jan 2013 01:20:39 -0500, Christoffer Dall
<c.dall@xxxxxxxxxxxxxxxxxxxxxx> wrote:
> So, eh..., we seem to have forgotten to enable the data cache in Hyp
> mode. This makes things more faster.
Faster should be enough. More faster feels like you're exceeding some
speed limit...
>
> Signed-off-by: Christoffer Dall <c.dall@xxxxxxxxxxxxxxxxxxxxxx>
> ---
> arch/arm/kvm/init.S | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S
> index f179f10..67ec26c 100644
> --- a/arch/arm/kvm/init.S
> +++ b/arch/arm/kvm/init.S
> @@ -90,8 +90,8 @@ __do_hyp_init:
> mrc p15, 0, r1, c1, c0, 0 @ SCTLR
> ldr r12, =(HSCTLR_EE | HSCTLR_FI)
> and r1, r1, r12
> - ARM( ldr r12, =(HSCTLR_M | HSCTLR_A | HSCTLR_I) )
> - THUMB( ldr r12, =(HSCTLR_M | HSCTLR_A | HSCTLR_I | HSCTLR_TE) )
> + ARM( ldr r12, =(HSCTLR_M | HSCTLR_A | HSCTLR_I | HSCTLR_C ) )
> + THUMB( ldr r12, =(HSCTLR_M | HSCTLR_A | HSCTLR_I | HSCTLR_C |
HSCTLR_TE)
> )
> orr r1, r1, r12
> orr r0, r0, r1
> isb
Nice catch.
Though you may want to remove the C and I bits from HSCTLR_MASK instead,
so we can honour the CPU_ICACHE_DISABLE and CPU_DCACHE_DISABLE options even
in HYP mode.
M.
--
Who you jivin' with that Cosmik Debris?
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