Hello,
The implementation depended part of the arch timers are defined in the Cortex-A15 TRM. So any hardware with a Cortex-A15 will have the same number of counters (described there) which function as described in the ARM ARM.What can differ from the vexpress implementation are the interrupt line numbers, which are defined in the device tree.
Add some the architected timer related infrastructure, and support timer
interrupt injection, which can happen as a resultof three possible
events:
- The virtual timer interrupt has fired while we were still
executing the guest
- The timer interrupt hasn't fired, but it expired while we
were doing the world switch
- A hrtimer we programmed earlier has fired
Best regards,
--
Antonios Motakis
Virtual Open Systems
Open Source KVM Virtualization Developments
Multicore Systems Virtualization Porting Services
Web: www.virtualopensystems.com
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