On 13/12/12 21:52, Christoffer Dall wrote:
>
>
> On Thursday, December 6, 2012, Marc Zyngier wrote:
>
> The GICH_* constants are defined by the HW spec, and best fit in
> gic.h. Also rename the bitfields to start with GICH_ as well.
>
>
> looks fine to me. Do these defines for gic.h need to come in a separate
> patch for the upstreaming?
Probably. I'll cook a separate patch.
>
>
>
> Signed-off-by: Marc Zyngier <marc.zyngier@xxxxxxx <javascript:;>>
> ---
> arch/arm/include/asm/hardware/gic.h | 24 ++++++++++++++++++++++++
> arch/arm/include/asm/kvm_arm.h | 12 ------------
> arch/arm/include/asm/kvm_vgic.h | 16 ++--------------
> arch/arm/kvm/interrupts_head.S | 2 ++
> arch/arm/kvm/vgic.c | 32
> ++++++++++++++++----------------
> 5 files changed, 44 insertions(+), 42 deletions(-)
>
> diff --git a/arch/arm/include/asm/hardware/gic.h
> b/arch/arm/include/asm/hardware/gic.h
> index 4b1ce6c..b699a9c 100644
> --- a/arch/arm/include/asm/hardware/gic.h
> +++ b/arch/arm/include/asm/hardware/gic.h
> @@ -32,6 +32,30 @@
> #define GIC_DIST_CONFIG 0xc00
> #define GIC_DIST_SOFTINT 0xf00
>
> +#define GICH_HCR 0x0
> +#define GICH_VTR 0x4
> +#define GICH_VMCR 0x8
> +#define GICH_MISR 0x10
> +#define GICH_EISR0 0x20
> +#define GICH_EISR1 0x24
> +#define GICH_ELRSR0 0x30
> +#define GICH_ELRSR1 0x34
> +#define GICH_APR 0xf0
> +#define GICH_LR0 0x100
> +
> +#define GICH_HCR_EN (1 << 0)
> +#define GICH_HCR_UIE (1 << 1)
> +
> +#define GICH_LR_VIRTUALID (0x3ff << 0)
> +#define GICH_LR_PHYSID_CPUID (7 << 10)
> +#define GICH_LR_STATE (3 << 28)
> +#define GICH_LR_PENDING_BIT (1 << 28)
> +#define GICH_LR_ACTIVE_BIT (1 << 29)
> +#define GICH_LR_EOI (1 << 19)
> +
> +#define GICH_MISR_EOI (1 << 0)
> +#define GICH_MISR_U (1 << 1)
> +
> #ifndef __ASSEMBLY__
> #include <linux/irqdomain.h>
> struct device_node;
> diff --git a/arch/arm/include/asm/kvm_arm.h
> b/arch/arm/include/asm/kvm_arm.h
> index b4bdd0c..151c4ce 100644
> --- a/arch/arm/include/asm/kvm_arm.h
> +++ b/arch/arm/include/asm/kvm_arm.h
> @@ -209,16 +209,4 @@
> #define HSR_EC_DABT (0x24)
> #define HSR_EC_DABT_HYP (0x25)
>
> -/* GICH offsets */
> -#define GICH_HCR 0x0
> -#define GICH_VTR 0x4
> -#define GICH_VMCR 0x8
> -#define GICH_MISR 0x10
> -#define GICH_EISR0 0x20
> -#define GICH_EISR1 0x24
> -#define GICH_ELRSR0 0x30
> -#define GICH_ELRSR1 0x34
> -#define GICH_APR 0xf0
> -#define GICH_LR0 0x100
> -
> #endif /* __ARM_KVM_ARM_H__ */
> diff --git a/arch/arm/include/asm/kvm_vgic.h
> b/arch/arm/include/asm/kvm_vgic.h
> index 2e2813a..3ecc29c 100644
> --- a/arch/arm/include/asm/kvm_vgic.h
> +++ b/arch/arm/include/asm/kvm_vgic.h
> @@ -25,6 +25,7 @@
> #include <linux/irqreturn.h>
> #include <linux/spinlock.h>
> #include <linux/types.h>
> +#include <asm/hardware/gic.h>
>
> #define VGIC_NR_IRQS 128
> #define VGIC_NR_SGIS 16
> @@ -49,7 +50,7 @@
> /*
> * The GIC distributor registers describing interrupts have two parts:
> * - 32 per-CPU interrupts (SGI + PPI)
> - * - a bunch of shared interrups (SPI)
> + * - a bunch of shared interrupts (SPI)
> */
> struct vgic_bitmap {
> union {
> @@ -135,19 +136,6 @@ struct vgic_cpu {
> #endif
> };
>
> -#define VGIC_HCR_EN (1 << 0)
> -#define VGIC_HCR_UIE (1 << 1)
> -
> -#define VGIC_LR_VIRTUALID (0x3ff << 0)
> -#define VGIC_LR_PHYSID_CPUID (7 << 10)
> -#define VGIC_LR_STATE (3 << 28)
> -#define VGIC_LR_PENDING_BIT (1 << 28)
> -#define VGIC_LR_ACTIVE_BIT (1 << 29)
> -#define VGIC_LR_EOI (1 << 19)
> -
> -#define VGIC_MISR_EOI (1 << 0)
> -#define VGIC_MISR_U (1 << 1)
> -
> #define LR_EMPTY 0xff
>
> struct kvm;
> diff --git a/arch/arm/kvm/interrupts_head.S
> b/arch/arm/kvm/interrupts_head.S
> index 5308eb2..2f79247 100644
> --- a/arch/arm/kvm/interrupts_head.S
> +++ b/arch/arm/kvm/interrupts_head.S
> @@ -1,3 +1,5 @@
> +#include <asm/hardware/gic.h>
> +
> #define VCPU_USR_REG(_reg_nr) (VCPU_USR_REGS + (_reg_nr * 4))
> #define VCPU_USR_SP (VCPU_USR_REG(13))
> #define VCPU_USR_LR (VCPU_USR_REG(14))
> diff --git a/arch/arm/kvm/vgic.c b/arch/arm/kvm/vgic.c
> index 9592067..780caf5 100644
> --- a/arch/arm/kvm/vgic.c
> +++ b/arch/arm/kvm/vgic.c
> @@ -59,7 +59,7 @@
> * - When a level interrupt is moved onto a vcpu, the corresponding
> * bit in irq_active is set. As long as this bit is set, the line
> * will be ignored for further interrupts. The interrupt is injected
> - * into the vcpu with the VGIC_LR_EOI bit set (generate a
> + * into the vcpu with the GICH_LR_EOI bit set (generate a
> * maintenance interrupt on EOI).
> * - When the interrupt is EOIed, the maintenance interrupt fires,
> * and clears the corresponding bit in irq_active. This allow the
> @@ -806,8 +806,8 @@ static void vgic_update_state(struct kvm *kvm)
> }
> }
>
> -#define LR_CPUID(lr) (((lr) & VGIC_LR_PHYSID_CPUID) >> 10)
> -#define MK_LR_PEND(src, irq) (VGIC_LR_PENDING_BIT | ((src) << 10)
> | (irq))
> +#define LR_CPUID(lr) (((lr) & GICH_LR_PHYSID_CPUID) >> 10)
> +#define MK_LR_PEND(src, irq) (GICH_LR_PENDING_BIT | ((src) << 10)
> | (irq))
>
> /*
> * An interrupt may have been disabled after being made pending on the
> @@ -824,12 +824,12 @@ static void vgic_retire_disabled_irqs(struct
> kvm_vcpu *vcpu)
> int lr;
>
> for_each_set_bit(lr, vgic_cpu->lr_used, vgic_cpu->nr_lr) {
> - int irq = vgic_cpu->vgic_lr[lr] & VGIC_LR_VIRTUALID;
> + int irq = vgic_cpu->vgic_lr[lr] & GICH_LR_VIRTUALID;
>
> if (!vgic_irq_is_enabled(vcpu, irq)) {
> vgic_cpu->vgic_irq_lr_map[irq] = LR_EMPTY;
> clear_bit(lr, vgic_cpu->lr_used);
> - vgic_cpu->vgic_lr[lr] &= ~VGIC_LR_STATE;
> + vgic_cpu->vgic_lr[lr] &= ~GICH_LR_STATE;
> if (vgic_irq_is_active(vcpu, irq))
> vgic_irq_clear_active(vcpu, irq);
> }
> @@ -859,7 +859,7 @@ static bool vgic_queue_irq(struct kvm_vcpu
> *vcpu, u8 sgi_source_id, int irq)
> (LR_CPUID(vgic_cpu->vgic_lr[lr]) == sgi_source_id)) {
> kvm_debug("LR%d piggyback for IRQ%d %x\n", lr, irq,
> vgic_cpu->vgic_lr[lr]);
> BUG_ON(!test_bit(lr, vgic_cpu->lr_used));
> - vgic_cpu->vgic_lr[lr] |= VGIC_LR_PENDING_BIT;
> + vgic_cpu->vgic_lr[lr] |= GICH_LR_PENDING_BIT;
>
> goto out;
> }
> @@ -877,7 +877,7 @@ static bool vgic_queue_irq(struct kvm_vcpu
> *vcpu, u8 sgi_source_id, int irq)
>
> out:
> if (!vgic_irq_is_edge(vcpu, irq))
> - vgic_cpu->vgic_lr[lr] |= VGIC_LR_EOI;
> + vgic_cpu->vgic_lr[lr] |= GICH_LR_EOI;
>
> return true;
> }
> @@ -977,9 +977,9 @@ static void __kvm_vgic_sync_to_cpu(struct
> kvm_vcpu *vcpu)
>
> epilog:
> if (overflow) {
> - vgic_cpu->vgic_hcr |= VGIC_HCR_UIE;
> + vgic_cpu->vgic_hcr |= GICH_HCR_UIE;
> } else {
> - vgic_cpu->vgic_hcr &= ~VGIC_HCR_UIE;
> + vgic_cpu->vgic_hcr &= ~GICH_HCR_UIE;
> /*
> * We're about to run this VCPU, and we've consumed
> * everything the distributor had in store for
> @@ -1010,7 +1010,7 @@ static bool vgic_process_maintenance(struct
> kvm_vcpu *vcpu)
> * this interrupt for this run. Big deal. It is still
> pending though,
> * and will get considered when this vcpu exits.
> */
> - if (vgic_cpu->vgic_misr & VGIC_MISR_EOI) {
> + if (vgic_cpu->vgic_misr & GICH_MISR_EOI) {
> /*
> * Some level interrupts have been EOIed. Clear their
> * active bit.
> @@ -1019,10 +1019,10 @@ static bool vgic_process_maintenance(struct
> kvm_vcpu *vcpu)
>
> for_each_set_bit(lr, (unsigned long
> *)vgic_cpu->vgic_eisr,
> vgic_cpu->nr_lr) {
> - irq = vgic_cpu->vgic_lr[lr] & VGIC_LR_VIRTUALID;
> + irq = vgic_cpu->vgic_lr[lr] & GICH_LR_VIRTUALID;
>
> vgic_irq_clear_active(vcpu, irq);
> - vgic_cpu->vgic_lr[lr] &= ~VGIC_LR_EOI;
> + vgic_cpu->vgic_lr[lr] &= ~GICH_LR_EOI;
>
> /* Any additional pending interrupt? */
> if (vgic_dist_irq_is_pending(vcpu, irq)) {
> @@ -1034,8 +1034,8 @@ static bool vgic_process_maintenance(struct
> kvm_vcpu *vcpu)
> }
> }
>
> - if (vgic_cpu->vgic_misr & VGIC_MISR_U)
> - vgic_cpu->vgic_hcr &= ~VGIC_HCR_UIE;
> + if (vgic_cpu->vgic_misr & GICH_MISR_U)
> + vgic_cpu->vgic_hcr &= ~GICH_HCR_UIE;
>
> return level_pending;
> }
> @@ -1063,7 +1063,7 @@ static void __kvm_vgic_sync_from_cpu(struct
> kvm_vcpu *vcpu)
> if (!test_and_clear_bit(lr, vgic_cpu->lr_used))
> continue;
>
> - irq = vgic_cpu->vgic_lr[lr] & VGIC_LR_VIRTUALID;
> + irq = vgic_cpu->vgic_lr[lr] & GICH_LR_VIRTUALID;
>
> BUG_ON(irq >= VGIC_NR_IRQS);
> vgic_cpu->vgic_irq_lr_map[irq] = LR_EMPTY;
> @@ -1251,7 +1251,7 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
> vgic_cpu->vgic_vmcr = 0;
>
> vgic_cpu->nr_lr = vgic_nr_lr;
> - vgic_cpu->vgic_hcr = VGIC_HCR_EN; /* Get the show on the
> road... */
> + vgic_cpu->vgic_hcr = GICH_HCR_EN; /* Get the show on the
> road... */
>
> return 0;
> }
> --
> 1.8.0.1
>
>
>
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>
--
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