As SGIs and PPIs are treated as edge-triggered, they must be cleared
as soon as they are queued into the list registers. Otherwise, we end-up
with spurious interrupts.
Signed-off-by: Marc Zyngier <marc.zyngier@xxxxxxx>
---
arch/arm/kvm/vgic.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/kvm/vgic.c b/arch/arm/kvm/vgic.c
index 581faf2..b83de57 100644
--- a/arch/arm/kvm/vgic.c
+++ b/arch/arm/kvm/vgic.c
@@ -797,8 +797,10 @@ static void __kvm_vgic_sync_to_cpu(struct kvm_vcpu *vcpu)
clear_bit(c, &sources);
}
- if (!sources)
+ if (!sources) {
clear_bit(i, pending);
+ kvm_vgic_vcpu_clear_pending_irq(vcpu, i);
+ }
dist->irq_sgi_sources[vcpu_id][i] = sources;
}
@@ -811,6 +813,7 @@ static void __kvm_vgic_sync_to_cpu(struct kvm_vcpu *vcpu)
}
clear_bit(i, pending);
+ kvm_vgic_vcpu_clear_pending_irq(vcpu, i);
}
--
1.7.12
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