[RFC PATCH 2/2] arndale5250: Wait for second cpu to enter SMP pen

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WARNIG: This patch does't work!

I'm sending the RFC mainly because I need help understanding why this is
the case.

I've tried reversing the loop, that is let CPU1 wait for CPU0 to write a
message, and that works: the kernel boots both CPUs in Hyp mode in that
case. A theroy could be that it is related to CPU0 being in secure mode
and CPU1 being in non-secure mode. I have also tried using a standard
DRAM address for the signal writes, but with no luck.

Note, that the previous commit works without this follow-on, so you can
use that for testing and fun stuff for now.

Signed-off-by: Jeremy C. Andrus <jeremya@xxxxxxxxxxxxxxx>
Signed-off-by: Christoffer Dall <cdall@xxxxxxxxxxxxxxx>
---
 board/samsung/smdk5250/smp.S |   11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/board/samsung/smdk5250/smp.S b/board/samsung/smdk5250/smp.S
index 998d2ab..c17f3a2 100644
--- a/board/samsung/smdk5250/smp.S
+++ b/board/samsung/smdk5250/smp.S
@@ -24,6 +24,9 @@
 
 #include <config.h>
 
+__smp_notify:
+	.word	0
+
 __smp_pen:
 	wfe
 	ldr	r1, [r0]
@@ -43,6 +46,9 @@ enter_smp_pen:
 	ldr	r0, =CONFIG_SYSFLAGS_ADDR
 	str	r2, [r0]
 
+	mov	r3, #1
+	str	r3, __smp_notify
+
 	/*
 	 * Make instruction copy coherent
 	 */
@@ -66,4 +72,9 @@ smp_kick_secondary:
 	str	r1, [r0]
 	dsb
 
+1:	ldr	r1, __smp_notify
+	cmp	r1, #0
+	dsb
+	beq	1b
+
 	mov	pc, lr
-- 
1.7.9.5

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