在 2012-9-5，下午9:19， Jon Medhurst (Tixy) 写道：
> On Wed, 2012-09-05 at 14:00 +0100, Dave Martin wrote:
>> On Wed, Sep 05, 2012 at 04:32:01PM +0800, Guodong Xu wrote:
>>> Turn on CCI snoops. Data abort exception is captured and handled
>>> for implementations where CCI is not integrated.
>>
>> This may work for now, but it's potentially fragile. We may get
>> platform variants where there is some different peripheral at 0x2c090000.
>
> I agree with the 'potentially fragile' assessment, however
> experimentation by Guodong and me showed that the CCI must be enabled on
> all cores and done before the bootwrapper drops into non-secure mode.
> I.e. before we get the chance to enter the C code and easily parse
> device-tree.
>
> Perhaps there is something we need to do to get access to CCI in non
> secure mode?
<guodong> I think there are two ways to access CCI from non-secure mode:
1. In Hyp mode, issue an SMC instruction to enter Secure Monitor mode and
do the job.
2. In secure mode (early stage in boot.S, or in monitor.S), change 'Secure Access Register' of CCI-400
to enable non-secure access. But this compromises system's security. I tested this and it can work:
diff --git a/monitor.S b/monitor.S
index dea8551..79acbc3 100644
--- a/monitor.S
+++ b/monitor.S
@@ -73,6 +73,13 @@ _non_sec:
ldr r11, =0x131
orr r12, r12, r11
mcr p15, 0, r12, c1, c1, 0
+ @
+ @ enable non-secure access to CCI
+ @
+ ldr r12, =0x2c090000
+ ldr r11, [r12, #0x8] @ CCI Secure access register
+ orr r11, r11, #0x1 @ bit[0] := 1
+ str r11, [r12, #0x8]
pop {r10-r12}
movs pc, lr
>
> --
> Tixy
>
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