On 25/06/12 22:14, Christoffer Dall wrote:
> On Mon, May 14, 2012 at 9:07 AM, Marc Zyngier <marc.zyngier at arm.com> wrote:
>> As the host kernel has to move its timer from virtual to physical,
>> let's make sure it has access to it. Otherwise, it would blow
>> at a very early stage.
>>
>> Signed-off-by: Marc Zyngier <marc.zyngier at arm.com>
>> ---
>> arch/arm/kvm/init.S | 5 +++++
>> 1 files changed, 5 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S
>> index 0bcc739..ce477ba 100644
>> --- a/arch/arm/kvm/init.S
>> +++ b/arch/arm/kvm/init.S
>> @@ -101,6 +101,11 @@ __do_hyp_init:
>> mcr p15, 4, r0, c1, c0, 0 @ HSCR
>> isb
>>
>> + @ make CNTP_* and CNTPCT accessible from PL1
>> + mrc p15, 4, r0, c14, c1, 0 @ CNTHCTL
>> + orr r0, r0, #3 @ PL1PCEN | PL1PCTEN
>> + mcr p15, 4, r0, c14, c1, 0 @ CNTHCTL
>> +
>> @ Set stack pointer and return to the kernel
>> pop {r0, r1, r2, r12}
>> mov sp, r1
>> --
>> 1.7.7.1
>>
> I'm not reviewing patches 1 through 4 as I am not experienced with the
> workings of architected timers in the kernel in general.
>
> I suggest sending that preparatory patch sequence separately to the
> arm-kernel mailing list or somewhere appropriate for this purpose?
This is on my queue of things I want to send to LAKML, but thought I'd
post them here first.
Patches 1 to 3 are good to go, I think. Patch 4 needs some wider
agreement, and to be honest, I really hate it.
> These bits should be 1 at reset anyway right? Why do we need to set them again?
Remember we may have some firmware between reset and the kernel boot.
These bits can (and probably will) be set to 0, preventing the kernel
from using the physical timers.
M.
--
Jazz is not dead. It just smells funny...
