[finally answering the review emails now that I'm rebasing most of my pending stuff for v9] On 04/06/12 03:32, Rusty Russell wrote: > On Thu, 31 May 2012 10:04:14 +0100, Marc Zyngier <marc.zyngier at arm.com> wrote: >> +static bool write_dcsw(struct kvm_vcpu *vcpu, >> + const struct coproc_params *p, >> + unsigned long cp15_reg) >> +{ >> + u32 val; >> + >> + val = *vcpu_reg(vcpu, p->Rt1); >> + >> + switch(p->CRm) { >> + case 6: /* Upgrade DCISW to DCCISW, as per HCR.SWIO */ >> + case 14: /* DCCISW */ >> + asm volatile("mcr p15, 0, %0, c7, c14, 2" : : "r" (val)); >> + break; >> + >> + case 10: /* DCCSW */ >> + asm volatile("mcr p15, 0, %0, c7, c10, 2" : : "r" (val)); >> + break; >> + } >> + >> + cpumask_setall(&vcpu->arch.require_dcache_flush); >> + cpumask_clear_cpu(vcpu->cpu, &vcpu->arch.require_dcache_flush); > > Hmm, but vcpu->cpu is not necessarily smp_processor_id() here. > > I think you do need get_cpu() and put_cpu() around this: > kvm_arch_vcpu_load() will do a full flush if vcpu->cpu != > smp_processor_id(). I think that now that we have both __kvm_vcpu_run() and handle_exit() as part of a non-preemptible section, we're guaranteed that vcpu->cpu is smp_processor_id(). M. -- Jazz is not dead. It just smells funny...