On Thu, May 31, 2012 at 10:04:14AM +0100, Marc Zyngier wrote: > The ARM ARM says in bold (B1.14.4): > "Virtualizing a uniprocessor system within an MP system, permitting a > virtual machine to move between different physical processors, makes > cache maintenance by set/way difficult. This is because a set/way > operation might be interrupted part way through its operation, and > therefore the hypervisor must reproduce the effect of the maintenance > on both physical processors." > > The direct consequence of this is that we have to trap all set/way > operations and make sure the other CPUs get the memo. In order to > avoid performance degradation, we maintain a per vcpu cpumask that > tracks the physical CPUs on which the cache operation must be performed. > The remote operation is only executed when migrating the vcpu. > > On the receiving end, we simply clean+invalidate the whole data cache > to avoid queueing up individual set/way operations. > > Reported-by: Peter Maydell <peter.maydell at linaro.org> > Cc: Will Deacon <will.deacon at arm.com> > Cc: Rusty Russell <rusty.russell at linaro.org> > Signed-off-by: Marc Zyngier <marc.zyngier at arm.com> This looks good to me: Acked-by: Will Deacon <will.deacon at arm.com> Cheers, Will
