The guest now successfully enables the MMU, caches and TLB's and execution continues well into the decompress_kernel function. Eventually, however, it takes a memory mis-alignment fault from the C-code to decompress the kernel and it should be investigated whether this is meant to be and should be signalled to the guest, or if it's due to an error in some emulation code. The code is rather clumsy looking with many debugging statements as of now, but it will be removed once the core functionality is well-tested. Finally, KVM now flushes the shadow page table on any sort of cache invalidation requested by the guest. ARM supports many many instructions for dealing with unified/non-unified, L1, L2 caches, TLB's and more. It would be good to get an understanding of which instructions should actually trigger a shadow page table invalidation to avoid the performance penalty of freeing, allocating and building a new shadow page table too often. /Christoffer -------------- next part -------------- An HTML attachment was scrubbed... URL: https://lists.cs.columbia.edu/pipermail/android-virt/attachments/20091003/27cfa6ee/attachment.html
