On Thu, Dec 31, 2020 at 09:23:33AM +0800, Huacai Chen wrote: > > Thanks, :-) > > Jinyang > Any comments? sure... > > > --- a/arch/mips/kernel/relocate_kernel.S > > > +++ b/arch/mips/kernel/relocate_kernel.S > > > @@ -6,6 +6,7 @@ > > > > > > #include <asm/asm.h> > > > #include <asm/asmmacro.h> > > > +#include <asm/cpu.h> > > > #include <asm/regdef.h> > > > #include <asm/mipsregs.h> > > > #include <asm/stackframe.h> > > > @@ -133,6 +134,33 @@ LEAF(kexec_smp_wait) > > > #else > > > sync > > > #endif > > > + > > > +#ifdef CONFIG_CPU_LOONGSON64 Is there a reason why you can't use the already existing infrastructure the way cavium-octeon is doing it ? If you can't please explain why so we can find a way to extend it. But having some sort of poking loongson registers in generic MIPS code is a non starter. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ] _______________________________________________ kexec mailing list kexec@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/kexec
