在 2018年10月27日 06:25, Borislav Petkov 写道: > On Fri, Oct 26, 2018 at 06:24:40PM +0200, Petr Tesarik wrote: >> But we need the MSR value from the panic kernel environment, not while >> the production kernel is still running, right? > > Actually, we need only the encryption bit number (and it should be 0 > otherwise to denote SME wasn't enabled). > Thanks for your comment. For this patch, it really needs only the encryption bit number. For the AMD machine with SME feature, the OS or HV sets bit 47 of a physical address to 1 in the page table entry to indicate the page should be encrypted. Thanks. Lianbo > I guess something like > > VMCOREINFO_NUMBER(sme_mask); > > which gets written by the kexec-ed kernel. > >> If so, then this reminds me that I have wanted for a long time to store >> more of the hardware state in a vmcore NOTE after a kernel crash ... >> control registers, MSRs and whatnot. Of course, this would be a >> long-term project, but I wonder what other people think about it in >> general. > > I guess that sounds like a good idea - the more relevant hw info for > debugging, the better. Determining the important MSRs to save would need > a bit of a pondering over though. For example, some MSRs are per-core, > some per-socket, etc... > _______________________________________________ kexec mailing list kexec@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/kexec