On 6/7/2017 5:06 PM, Boris Ostrovsky wrote:
> On 06/07/2017 03:14 PM, Tom Lendacky wrote:
>> The cr3 register entry can contain the SME encryption bit that indicates
>> the PGD is encrypted. The encryption bit should not be used when creating
>> a virtual address for the PGD table.
>>
>> Create a new function, read_cr3_pa(), that will extract the physical
>> address from the cr3 register. This function is then used where a virtual
>> address of the PGD needs to be created/used from the cr3 register.
>>
>> Signed-off-by: Tom Lendacky <thomas.lendacky at amd.com>
>> ---
>> arch/x86/include/asm/special_insns.h | 9 +++++++++
>> arch/x86/kernel/head64.c | 2 +-
>> arch/x86/mm/fault.c | 10 +++++-----
>> arch/x86/mm/ioremap.c | 2 +-
>> arch/x86/platform/olpc/olpc-xo1-pm.c | 2 +-
>> arch/x86/power/hibernate_64.c | 2 +-
>> arch/x86/xen/mmu_pv.c | 6 +++---
>> 7 files changed, 21 insertions(+), 12 deletions(-)
>>
...
>> diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c
>> index 1f386d7..2dc5243 100644
>> --- a/arch/x86/xen/mmu_pv.c
>> +++ b/arch/x86/xen/mmu_pv.c
>> @@ -2022,7 +2022,7 @@ static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
>> pmd_t pmd;
>> pte_t pte;
>>
>> - pa = read_cr3();
>> + pa = read_cr3_pa();
>> pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
>> sizeof(pgd)));
>> if (!pgd_present(pgd))
>> @@ -2102,7 +2102,7 @@ void __init xen_relocate_p2m(void)
>> pt_phys = pmd_phys + PFN_PHYS(n_pmd);
>> p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
>>
>> - pgd = __va(read_cr3());
>> + pgd = __va(read_cr3_pa());
>> new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
>> idx_p4d = 0;
>> save_pud = n_pud;
>> @@ -2209,7 +2209,7 @@ static void __init xen_write_cr3_init(unsigned long cr3)
>> {
>> unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
>>
>> - BUG_ON(read_cr3() != __pa(initial_page_table));
>> + BUG_ON(read_cr3_pa() != __pa(initial_page_table));
>> BUG_ON(cr3 != __pa(swapper_pg_dir));
>>
>> /*
>
>
> (Please copy Xen maintainers when modifying xen-related files.)
Sorry about that, missed adding the Xen maintainers when I added this
change.
>
> Given that page tables for Xen PV guests are controlled by the
> hypervisor I don't think this change (although harmless) is necessary.
I can back this change out if the Xen maintainers think that's best.
> What may be needed is making sure X86_FEATURE_SME is not set for PV guests.
And that may be something that Xen will need to control through either
CPUID or MSR support for the PV guests.
Thanks,
Tom
>
> -boris
>
