> It's from my understanding, I didn't get the explicit description from the intel SDM on this point. > If a broadcast SRAO comes on real hardware, will MSR_IA32_MCG_STATUS of each cpu have MCG_STATUS_RIPV bit set? MCG_STATUS is a per-thread MSR and will contain the status appropriate for that thread when #MC is delivered. So the RIPV bit will be set if, and only if, the thread saved a valid return address for this exception. The net result is that it is almost always set for "innocent bystander" CPUs that were dragged into the exception handler because of a broadcast #MC. We make the test because if it isn't set, then the do_machine_check() had better not return because we have no idea where it will return to - since there is not a valid return IP. -Tony
