Starting with kernel v4.7, masked bit values are the same for 4K and
64K pagesizes. This patch updates here accordingly.
Signed-off-by: Hari Bathini <hbathini at linux.vnet.ibm.com>
---
arch/ppc64.c | 6 ++++++
makedumpfile.h | 4 ++++
2 files changed, 10 insertions(+)
diff --git a/arch/ppc64.c b/arch/ppc64.c
index 6b82cc2..40076eb 100644
--- a/arch/ppc64.c
+++ b/arch/ppc64.c
@@ -286,6 +286,12 @@ ppc64_vmalloc_init(void)
info->pmd_masked_bits = PMD_MASKED_BITS_4K;
}
+ if (info->kernel_version >= KERNEL_VERSION(4, 7, 0)) {
+ info->pgd_masked_bits = PGD_MASKED_BITS_4_7;
+ info->pud_masked_bits = PUD_MASKED_BITS_4_7;
+ info->pmd_masked_bits = PMD_MASKED_BITS_4_7;
+ }
+
info->pte_rpn_mask = PTE_RPN_MASK_DEFAULT;
if (info->kernel_version >= KERNEL_VERSION(4, 6, 0)) {
info->pte_rpn_mask = PTE_RPN_MASK_L4_4_6;
diff --git a/makedumpfile.h b/makedumpfile.h
index a85fd7f..69747c0 100644
--- a/makedumpfile.h
+++ b/makedumpfile.h
@@ -664,6 +664,10 @@ int get_va_bits_arm64(void);
#define PTE_RPN_MASK_L4_4_6 (((1UL << PTE_RPN_SIZE_L4_4_6) - 1) << info->page_shift)
#define PTE_RPN_SHIFT_L4_4_6 info->page_shift
+#define PGD_MASKED_BITS_4_7 0xc0000000000000ffUL
+#define PUD_MASKED_BITS_4_7 0xc0000000000000ffUL
+#define PMD_MASKED_BITS_4_7 0xc0000000000000ffUL
+
#define PGD_MASK_L4 \
(info->kernel_version >= KERNEL_VERSION(3, 10, 0) ? (info->ptrs_per_pgd - 1) : 0x1ff)
#define PGD_OFFSET_L4(vaddr) ((vaddr >> (info->l4_shift)) & PGD_MASK_L4)
