Vivek Goyal <vgoyal at redhat.com> writes: > Ok. Got it. So in this case we route the interrupts directly through LAPIC > and put LVT0 in ExtInt mode and IOAPIC is bypassed. > > I am looking at Intel Multiprocessor specification v1.4 and as per figure > 3-3 on page 3-9, 8259 is connected to LINTIN0 line, which in turn is > connected to LINTIN0 pin on all processors. If that is the case, even in > this mode, all the CPU should see the timer interrupts (which is coming > from 8259)? However things are implemented completely differently now. I don't think the coherent hypertransport domain of AMD processors actually routes ExtINT interrupts to all cpus but instead one (the default route?) is picked. So I think for the kdump case we pretty much need to use an IOAPIC in virtual wire mode for recent AMD systems. For current Intel systems I believe either scenario still works. > Can you print the LAPIC registers (print_local_APIC) during normal boot > and during kdump boot and paste here? It's worth a look. I still think we need to just use apic mode at kernel startup, and be done with it. Eric
