Vivek Goyal wrote: > But the issue here seems to be that LAPIC state got clear but IRR bit > at IOAPIC bit is not cleared because IOAPIC vector information was deleted > in first kernel and now upon receiving EOI, it does not know this EOI belongs > to which vector. I am making another experiment right now. I check the LAPIC ISR flags in machine_crash_shutdown() before disabling the LAPIC, trying to send EOI if I find one ISR bit set. So far, I haven't seen a single case where an ISR bit was set, but several (9) where the IO-APIC IRR bit was set. OTOH, I know that if I'd re-enable IRQs, IRQ 225 would be raised. The whole thing is done before disable_IO_APIC(). Don't ask me for an explanation why I don't see the ISR bits. The arch/x86_64/kernel/crash.c portion of the patch I am using is attached for your reference. The rest is the same as for the original patch. Martin -- Martin Wilck PRIMERGY System Software Engineer FSC IP ESP DE6 Fujitsu Siemens Computers GmbH Heinz-Nixdorf-Ring 1 33106 Paderborn Germany Tel: ++49 5251 8 15113 Fax: ++49 5251 8 20409 Email: mailto:martin.wilck at fujitsu-siemens.com Internet: http://www.fujitsu-siemens.com Company Details: http://www.fujitsu-siemens.com/imprint.html -------------- next part -------------- A non-text attachment was scrubbed... Name: kdump_23.diff Type: text/x-patch Size: 3925 bytes Desc: not available Url : http://lists.infradead.org/pipermail/kexec/attachments/20070808/891ac94b/attachment-0001.bin
