On Fri, Nov 28, 2008 at 09:26:04AM +0000, Al Viro wrote:
gyah... That would be
> static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
> {
> unsigned long temp, res;
> __asm__ __volatile__(
> "1: ldl_l %0,%1\n"
> " cmpne %0,%4,%2\n"
" beq %2,3f\n"
" addl %0,%3,%2\n"
> " stl_c %2,%1\n"
> " beq %2,2f\n"
> "3:\n"
> ".subsection 2\n"
> "2: br 1b\n"
> ".previous"
> :"=&r" (temp), "=m" (v->counter), "=&r" (res)
> :"Ir" (a), "Ir" (u), "m" (v->counter) : "memory");
> smp_mb();
> return res;
> }
>
> static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
> {
> unsigned long temp, res;
> __asm__ __volatile__(
> "1: ldq_l %0,%1\n"
> " cmpne %0,%4,%2\n"
" beq %2,3f\n"
" addq %0,%3,%2\n"
> " stq_c %2,%1\n"
> " beq %2,2f\n"
> "3:\n"
> ".subsection 2\n"
> "2: br 1b\n"
> ".previous"
> :"=&r" (temp), "=m" (v->counter), "=&r" (res)
> :"Ir" (a), "Ir" (u), "m" (v->counter) : "memory");
> smp_mb();
> return res;
> }
>
> Comments?
> --
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