On Fri, 29 Aug 2008, Yinghai Lu wrote: > > the BAR is from pci_read_bases..., so that chipset is broken... > they are even supposed to to hide that BAR to os. Ok, can we please - *do* get a quirk for known-broken chipsets (at a *PCI* level, this is not an x86 issue) - *not* get any more random PCI work-arounds that go through the x86 tree and aren't even looked at by the (very few) people who actually understand the PCI resource handling? IOW, for the first issue, just teach pci_mmcfg_check_hostbridge() about this broken bridge, and have it fix things up (including hiding the thing, but also just verifying that the dang thing even -works- etc). For the second issue - please do realize that we have had much over a _decade_ of work on the PCI resource handling, and it's fragile. The thing I reverted really isn't something that Ingo should ever have committed in the first place. It's not something an x86 maintainer can even make sane decisions on. Resource handling things _need_ to get ACK's from people like Ivan Kokshaysky or me. Or at least _several_ other people who actually really understand not just PCI resource handling, but have actually seen all the horrible crap it causes, and understand how fragile this stuff is. It's all different, and it's all about all the million of broken machines out there that screw things up. Linus -- To unsubscribe from this list: send the line "unsubscribe kernel-testers" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html