On Tue, 2023-01-31 at 16:34 +0000, Reshetova, Elena wrote: [...] > > You cited this as your example. I'm pointing out it seems to be an > > event of the class we've agreed not to consider because it's an > > oops not an exploit. If there are examples of fixing actual > > exploits to CC VMs, what are they? > > > > This patch is, however, an example of the problem everyone else on > > the thread is complaining about: a patch which adds an unnecessary > > check to the MSI subsystem; unnecessary because it doesn't fix a CC > > exploit and in the real world the tables are correct (or the > > manufacturer is quickly chastened), so it adds overhead to no > > benefit. > > How can you make sure there is no exploit possible using this crash > as a stepping stone into a CC guest? I'm not, what I'm saying is you haven't proved it can be used to exfiltrate secrets. In a world where the PCI device is expected to be correct, and the non-CC kernel doesn't want to second guess that, there are loads of lies you can tell to the PCI subsystem that causes a crash or a hang. If we fix every one, we end up with a massive patch set and a huge potential slow down for the non-CC kernel. If there's no way to tell what lies might leak data, the fuzzing results are a mass of noise with no real signal and we can't even quantify by how much (or even if) we've improved the CC VM attack surface even after we merge the huge patch set it generates. > Or are you saying that we are back to the times when we can merge > the fixes for crashes and out of bound errors in kernel only given > that we submit a proof of concept exploit with the patch for every > issue? The PCI people have already said that crashing in the face of bogus configuration data is expected behaviour, so just generating the crash doesn't prove there's a problem to be fixed. That means you do have to go beyond and demonstrate there could be an information leak in a CC VM on the back of it, yes. > > [...] > > > > see what else it could detect given the signal will be > > > > smothered by oopses and secondly I think the PCI interface is > > > > likely the wrong place to begin and you should probably begin > > > > on the virtio bus and the hypervisor generated configuration > > > > space. > > > > > > This is exactly what we do. We don’t fuzz from the PCI config > > > space, we supply inputs from the host/vmm via the legitimate > > > interfaces that it can inject them to the guest: whenever guest > > > requests a pci config space (which is controlled by > > > host/hypervisor as you said) read operation, it gets input > > > injected by the kafl fuzzer. Same for other interfaces that are > > > under control of host/VMM (MSRs, port IO, MMIO, anything that > > > goes via #VE handler in our case). When it comes to virtio, we > > > employ two different fuzzing techniques: directly injecting kafl > > > fuzz input when virtio core or virtio drivers gets the data > > > received from the host (via injecting input in functions > > > virtio16/32/64_to_cpu and others) and directly fuzzing DMA memory > > > pages using kfx fuzzer. More information can be found in > > > https://intel.github.io/ccc-linux-guest-hardening-docs/tdx-guest- > > hardening.html#td-guest-fuzzing > > > > Given that we previously agreed that oppses and other DoS attacks > > are out of scope for CC, I really don't think fuzzing, which > > primarily finds oopses, is at all a useful tool unless you filter > > the results by the question "could we exploit this in a CC VM to > > reveal secrets". Without applying that filter you're sending a load > > of patches which don't really do much to reduce the CC attack > > surface and which do annoy non-CC people because they add pointless > > checks to things they expect the cards and config tables to get > > right. > > I don’t think we have agreed that random kernel crashes are out of > scope in CC threat model (controlled safe panic is out of scope, but > this is not what we have here). So perhaps making it a controlled panic in the CC VM, so we can guarantee no information leak, would be the first place to start? > It all depends if this ops can be used in a successful attack against > guest private memory or not and this is *not* a trivial thing to > decide. Right, but if you can't decide that, you can't extract the signal from your fuzzing tool noise. > That's said, we are mostly focusing on KASAN findings, which > have higher likelihood to be exploitable at least for host -> guest > privilege escalation (which in turn compromised guest private memory > confidentiality). Fuzzing has a long history of find such issues in > past (including the ones that have been exploited after). But even > for this ops bug, can anyone guarantee it cannot be chained with > other ones to cause a more complex privilege escalation attack? > I wont be making such a claim, I feel it is safer to fix this vs > debating whenever it can be used for an attack or not. The PCI people have already been clear that adding a huge framework of checks to PCI table parsing simply for the promise it "might possibly" improve CC VM security is way too much effort for too little result. If you can hone that down to a few places where you can show it will prevent a CC information leak, I'm sure they'll be more receptive. Telling them to disprove your assertion that there might be an exploit here isn't going to make them change their minds. James
