On Fri, Nov 15, 2019 at 7:20 AM Mark Rutland <mark.rutland@xxxxxxx> wrote: > > On Tue, Nov 05, 2019 at 03:56:08PM -0800, Sami Tolvanen wrote: > > This change implements shadow stack switching, initial SCS set-up, > > and interrupt shadow stacks for arm64. > > Each CPU also has an overflow stack, and two SDEI stacks, which should > presumably be given their own SCS. SDEI is effectively a software-NMI, > so it should almost certainly have the same treatement as IRQ. Makes sense. I'll take a look at adding shadow stacks for the SDEI handler. > Can we please fold this comment into the one above, and have: > > /* > * The callee-saved regs (x19-x29) should be preserved between > * irq_stack_entry and irq_stack_exit. > */ > .macro irq_stack_exit > mov sp, x19 > #ifdef CONFIG_SHADOW_CALL_STACK > mov x18, x20 > #endif > .endm Sure, I'll change this in the next version. Sami
