Re: io_uring failure on parisc with VIPT caches

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On 2023-02-15 10:52 a.m., Helge Deller wrote:
Are they from the kernel side, if the lower bits mean we end up
with the same coloring? Because I think this is a bit of a big
hammer, in terms of overhead for flushing. As an example, on arm64
that is perfectly fine with the existing code, it's about a 20-25%
performance hit.

The io_uring-test testcase still works on rp3440 with the kernel
flushes removed.

That's what I suspected, the important bit here is just aligning it for
identical coloring. Can you confirm if the below works for you? Had to
fiddle it a bit to get it to work without coloring.

Yes, the patch works for me on 32- and 64-bit, even with PA8900 CPUs...

Is there maybe somewhere a more detailled testcase which I could try too?
We need to look at liburing and mariadb testsuites.  Mariadb testsuite failed last night
on rp3440.  So, I don't think we have a full solution for machines with PA8800 and PA8900
CPUs.

As I have said in the past, I don't think we have a consistent alias boundary for these
machines because of their L2 cache design.

--
John David Anglin  dave.anglin@xxxxxxxx




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