Hi, Arun, Beignet patch is reviewed by ruiling, can you have to export them? Thanks, Yang Rong > -----Original Message----- > From: Beignet [mailto:beignet-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of > Arun Siluvery > Sent: Wednesday, June 15, 2016 16:17 > To: Yang, Rong R <rong.r.yang@xxxxxxxxx>; beignet@xxxxxxxxxxxxxxxxxxxxx; > intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: Re: [Beignet] [PATCH] intel: Export pooled EU and min no. of eus in a > pool. > > On 15/06/2016 13:49, Yang Rong wrote: > > Update kernel interface with new I915_GETPARAM ioctl entries for > > pooled EU and min no. of eus in a pool. Add a wrapping function for > > each parameter. Userspace drivers need these values when decide the > > thread count. This kernel enabled pooled eu by default for BXT and for > > fused down 2x6 parts it is advised to turn it off. > > > > But there is another HW issue in these parts (fused down 2x6 parts) > > before C0 that requires Pooled EU to be enabled as a workaround. In > > this case the pool configuration changes depending upon which subslice > > is disabled and the no. of eus in a pool is different, So userspace > > need to know min no. of eus in a pool. > > > > Signed-off-by: Yang Rong <rong.r.yang@xxxxxxxxx> > > --- > > include/drm/i915_drm.h | 2 ++ > > intel/intel_bufmgr.h | 3 +++ > > intel/intel_bufmgr_gem.c | 32 ++++++++++++++++++++++++++++++++ > > 3 files changed, 37 insertions(+) > > > > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index > > c4ce6b2..eb611a7 100644 > > --- a/include/drm/i915_drm.h > > +++ b/include/drm/i915_drm.h > > @@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait { > > #define I915_PARAM_HAS_GPU_RESET 35 > > #define I915_PARAM_HAS_RESOURCE_STREAMER 36 > > #define I915_PARAM_HAS_EXEC_SOFTPIN 37 > > +#define I915_PARAM_HAS_POOLED_EU 38 > > +#define I915_PARAM_MIN_EU_IN_POOL 39 > > > > Please note that these are not yet added in kernel because opensource user > is required to merge kernel support. > > At the moment kernel bits are separated and are merged, only thing > remaining is to export these getparam ioctls which can be done once > userspace is available which is the current set of patches. > > Once these patches are reviewed then I can export them from kernel side > also. > > regards > Arun > > > typedef struct drm_i915_getparam { > > __s32 param; > > diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index > > a1abbcd..8370694 100644 > > --- a/intel/intel_bufmgr.h > > +++ b/intel/intel_bufmgr.h > > @@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context > *ctx, > > int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total); > > int drm_intel_get_eu_total(int fd, unsigned int *eu_total); > > > > +int drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu); int > > +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu); > > + > > /** @{ Compatibility defines to keep old code building despite the symbol > rename > > * from dri_* to drm_intel_* > > */ > > diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index > > 0a4012b..b8bb654 100644 > > --- a/intel/intel_bufmgr_gem.c > > +++ b/intel/intel_bufmgr_gem.c > > @@ -3237,6 +3237,38 @@ drm_intel_get_eu_total(int fd, unsigned int > *eu_total) > > return 0; > > } > > > > +int > > +drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu) { > > + drm_i915_getparam_t gp; > > + int ret; > > + > > + memclear(gp); > > + gp.value = (int*)has_pooled_eu; > > + gp.param = I915_PARAM_HAS_POOLED_EU; > > + ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); > > + if (ret) > > + return -errno; > > + > > + return 0; > > +} > > + > > +int > > +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu) { > > + drm_i915_getparam_t gp; > > + int ret; > > + > > + memclear(gp); > > + gp.value = (int*)min_eu; > > + gp.param = I915_PARAM_MIN_EU_IN_POOL; > > + ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); > > + if (ret) > > + return -errno; > > + > > + return 0; > > +} > > + > > /** > > * Annotate the given bo for use in aub dumping. > > * > > > > _______________________________________________ > Beignet mailing list > Beignet@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/beignet _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx