On 10/06/16 17:50, Dave Gordon wrote:
These registers are not actually writable by the CPU; only the GuC can actually program them. So let's not do writes that have no effect. Signed-off-by: Dave Gordon <david.s.gordon@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_guc_submission.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index e198599..45b33f8 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -197,14 +197,9 @@ static void guc_disable_doorbell(struct intel_guc *guc, doorbell->db_status = GUC_DOORBELL_DISABLED; - I915_WRITE(drbreg, I915_READ(drbreg) & ~GEN8_DRB_VALID); - value = I915_READ(drbreg); WARN_ON((value & GEN8_DRB_VALID) != 0); - I915_WRITE(GEN8_DRBREGU(client->doorbell_id), 0); - I915_WRITE(drbreg, 0); - /* XXX: wait for any interrupts */ /* XXX: wait for workqueue to drain */ }
I have to trust you on this one. :) Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
