If we want to read the pages directly via the CPU, we have to be sure that we have to flush the writes via the GTT (as the CPU can not see the address aliasing). Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/i915_gem.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index c6d06cb21191..18b4a684ddde 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -571,6 +571,8 @@ int i915_gem_obj_prepare_shmem_read(struct drm_i915_gem_object *obj, if ((obj->ops->flags & I915_GEM_OBJECT_HAS_STRUCT_PAGE) == 0) return -EINVAL; + i915_gem_object_flush_gtt_write_domain(obj); + if (!(obj->base.read_domains & I915_GEM_DOMAIN_CPU)) { ret = i915_gem_object_wait_rendering(obj, true); if (ret) @@ -611,6 +613,8 @@ int i915_gem_obj_prepare_shmem_write(struct drm_i915_gem_object *obj, if ((obj->ops->flags & I915_GEM_OBJECT_HAS_STRUCT_PAGE) == 0) return -EINVAL; + i915_gem_object_flush_gtt_write_domain(obj); + if (obj->base.write_domain != I915_GEM_DOMAIN_CPU) { ret = i915_gem_object_wait_rendering(obj, false); if (ret) -- 2.8.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx