On Thu, 09 Jun 2016, Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> wrote: > IGT vblank tests fail on CHV by timing out on VBIs if PSR is enabled. We > do not get VBIs as the source timing generation is disabled when PSR is > active. The first two patches written by Rodrigo add drm hooks. Patch 3 > deactivates PSR when VBI are needed. The first thing to do would be to submit a patch that disables PSR by default on CHV. We can enable it again if and when these patches land. BR, Jani. > > [PATCH 1/3] drm: Add vblank prepare and unprepare hooks. > [PATCH 2/3] drm/i915: Move drm_crtc_vblank_get out of disabled > [PATCH 3/3] drm/i915/psr: Do not activate PSR when vblank interrupts > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
