On Mon, Jun 06, 2016 at 04:29:07PM +0300, Mika Kahola wrote:
> Helper routine to read out maximum supported bits per
> component for DisplayPort legay converters.
>
> Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx>
> ---
> drivers/gpu/drm/drm_dp_helper.c | 31 +++++++++++++++++++++++++++++++
> include/drm/drm_dp_helper.h | 2 ++
> 2 files changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index 18b72eb..bac0ccc 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -507,6 +507,37 @@ int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
> }
> EXPORT_SYMBOL(drm_dp_downstream_max_clock);
>
> +/**
> + * drm_dp_downstream_max_bpc() - extract branch device max
> + * bits per component
> + * @dpcd: DisplayPort configuration data
> + * @port_cap: port capabilities
> + *
> + * Returns max bpc on success or negative error code on failure
> + */
> +int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
> + const u8 port_cap[4])
> +{
> + int type = drm_dp_downstream_type(dpcd, port_cap);
> + bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> + DP_DETAILED_CAP_INFO_AVAILABLE;
> +
> + if (detailed_cap_info) {
Early return again.
> + if (type != DP_DS_PORT_TYPE_WIRELESS) {
switch() again.
> + int tmp;
> + tmp = port_cap[2] & DP_DS_VGA_MAX_BPC_MASK;
Should drop the "VGA" from that stuff since it applies to more than
that.
> +
> + if (tmp == 0)
> + return 8;
> + else
> + return 8 + (1<<tmp);
switch() with each case would be less magicy.
> + }
> + }
> +
> + return -EINVAL;
Again I think I'd just use 0 here.
> +}
> +EXPORT_SYMBOL(drm_dp_downstream_max_bpc);
> +
> /*
> * I2C-over-AUX implementation
> */
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index c3324d3..d4abc38 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -812,6 +812,8 @@ int drm_dp_downstream_port_cap(struct drm_dp_aux *aux,
> int drm_dp_downstream_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4]);
> int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
> const u8 port_cap[4]);
> +int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
> + const u8 port_cap[4]);
>
> int drm_dp_aux_register(struct drm_dp_aux *aux);
> void drm_dp_aux_unregister(struct drm_dp_aux *aux);
> --
> 1.9.1
--
Ville Syrjälä
Intel OTC
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