On Wed, Jun 08, 2016 at 02:15:25PM +0100, Chris Wilson wrote: > On Wed, Jun 08, 2016 at 01:41:46PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Move the encoder cloning check to happen earlier in the modeset. The > > main benefit will be that the debug output from a failed modeset will > > be less confusing as output_types can not indicate an invalid > > configuration during the later computation stages. > > > > For instance, what happened to me was kms_setmode was attempting one > > of its invalid cloning checks during which it asked for DP+VGA cloning > > on HSW. In this case the DP .compute_config() was executed after > > the FDI .compute_config() leaving the DP link clock (1.62 in this case) > > in port_clock, and then later the FDI BW computation tried to use that > > as the FDI link clock (which should always be 2.7). 1.62 x 2 wasn't > > enough for the mode it was trying to use, and so it ended up rejecting > > the modeset, not because of an invalid cloning configuration, but > > because of supposedly running out of FDI bandwidth. Took me a while > > to figure out what had actually happened. > > Did it reject the 1.62 link clock when you simply removed the > check_encoder_cloning()? Just checking... :) Nope. The rejection only happened due to exceeding the max fdi lane count. I think I had a warn in there somewhere when I originally submitted the fdi==port_clock patch, but that apparently didn't survive into the version that eventually got merged. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
