The future annotations will track the locking used for access to ensure
that it is always sufficient. We make the preparations now to present
the API ahead and to make sure that GCC can eliminate the unused
parameter.
Before: 6298417 3619610 696320 10614347 a1f64b vmlinux
After: 6298417 3619610 696320 10614347 a1f64b vmlinux
Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/i915_debugfs.c | 12 +++++---
drivers/gpu/drm/i915/i915_gem.c | 49 ++++++++++++++++++++++-----------
drivers/gpu/drm/i915/i915_gem_fence.c | 3 +-
drivers/gpu/drm/i915/i915_gem_request.h | 38 +++++++++++++++----------
drivers/gpu/drm/i915/i915_gem_tiling.c | 3 +-
drivers/gpu/drm/i915/i915_gem_userptr.c | 3 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 29 +++++++++++++++----
drivers/gpu/drm/i915/intel_display.c | 12 +++++---
8 files changed, 102 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index fefb35c4becc..d35454d5683e 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -155,10 +155,13 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
obj->base.write_domain);
for_each_engine_id(engine, dev_priv, id)
seq_printf(m, "%x ",
- i915_gem_active_get_seqno(&obj->last_read[id]));
+ i915_gem_active_get_seqno(&obj->last_read[id],
+ &obj->base.dev->struct_mutex));
seq_printf(m, "] %x %x%s%s%s",
- i915_gem_active_get_seqno(&obj->last_write),
- i915_gem_active_get_seqno(&obj->last_fence),
+ i915_gem_active_get_seqno(&obj->last_write,
+ &obj->base.dev->struct_mutex),
+ i915_gem_active_get_seqno(&obj->last_fence,
+ &obj->base.dev->struct_mutex),
i915_cache_level_str(to_i915(obj->base.dev), obj->cache_level),
obj->dirty ? " dirty" : "",
obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
@@ -193,7 +196,8 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
seq_printf(m, " (%s mappable)", s);
}
- engine = i915_gem_active_get_engine(&obj->last_write);
+ engine = i915_gem_active_get_engine(&obj->last_write,
+ &obj->base.dev->struct_mutex);
if (engine)
seq_printf(m, " (%s)", engine->name);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 99e3b269b4b9..610378bd1be4 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1120,21 +1120,24 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj,
return 0;
if (readonly) {
- request = i915_gem_active_peek(&obj->last_write);
+ request = i915_gem_active_peek(&obj->last_write,
+ &obj->base.dev->struct_mutex);
if (request) {
ret = i915_wait_request(request);
if (ret)
return ret;
i = request->engine->id;
- if (i915_gem_active_peek(&obj->last_read[i]) == request)
+ if (i915_gem_active_peek(&obj->last_read[i],
+ &obj->base.dev->struct_mutex) == request)
i915_gem_object_retire__read(obj, i);
else
i915_gem_object_retire__write(obj);
}
} else {
for (i = 0; i < I915_NUM_ENGINES; i++) {
- request = i915_gem_active_peek(&obj->last_read[i]);
+ request = i915_gem_active_peek(&obj->last_read[i],
+ &obj->base.dev->struct_mutex);
if (!request)
continue;
@@ -1156,9 +1159,11 @@ i915_gem_object_retire_request(struct drm_i915_gem_object *obj,
{
int ring = req->engine->id;
- if (i915_gem_active_peek(&obj->last_read[ring]) == req)
+ if (i915_gem_active_peek(&obj->last_read[ring],
+ &obj->base.dev->struct_mutex) == req)
i915_gem_object_retire__read(obj, ring);
- else if (i915_gem_active_peek(&obj->last_write) == req)
+ else if (i915_gem_active_peek(&obj->last_write,
+ &obj->base.dev->struct_mutex) == req)
i915_gem_object_retire__write(obj);
if (req->reset_counter == i915_reset_counter(&req->i915->gpu_error))
@@ -1187,7 +1192,8 @@ i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj,
if (readonly) {
struct drm_i915_gem_request *req;
- req = i915_gem_active_peek(&obj->last_write);
+ req = i915_gem_active_peek(&obj->last_write,
+ &obj->base.dev->struct_mutex);
if (req == NULL)
return 0;
@@ -1196,7 +1202,8 @@ i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj,
for (i = 0; i < I915_NUM_ENGINES; i++) {
struct drm_i915_gem_request *req;
- req = i915_gem_active_peek(&obj->last_read[i]);
+ req = i915_gem_active_peek(&obj->last_read[i],
+ &obj->base.dev->struct_mutex);
if (req == NULL)
continue;
@@ -2121,7 +2128,9 @@ static void
i915_gem_object_retire__write(struct drm_i915_gem_object *obj)
{
GEM_BUG_ON(!__i915_gem_active_is_busy(&obj->last_write));
- GEM_BUG_ON(!(obj->active & intel_engine_flag(i915_gem_active_get_engine(&obj->last_write))));
+ GEM_BUG_ON(!(obj->active &
+ intel_engine_flag(i915_gem_active_get_engine(&obj->last_write,
+ &obj->base.dev->struct_mutex))));
i915_gem_active_set(&obj->last_write, NULL);
intel_fb_obj_flush(obj, true, ORIGIN_CS);
@@ -2139,7 +2148,8 @@ i915_gem_object_retire__read(struct drm_i915_gem_object *obj, int ring)
list_del_init(&obj->engine_list[ring]);
i915_gem_active_set(&obj->last_read[ring], NULL);
- engine = i915_gem_active_get_engine(&obj->last_write);
+ engine = i915_gem_active_get_engine(&obj->last_write,
+ &obj->base.dev->struct_mutex);
if (engine && engine->id == ring)
i915_gem_object_retire__write(obj);
@@ -2352,7 +2362,8 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *engine)
struct drm_i915_gem_object,
engine_list[engine->id]);
- if (!list_empty(&i915_gem_active_peek(&obj->last_read[engine->id])->list))
+ if (!list_empty(&i915_gem_active_peek(&obj->last_read[engine->id],
+ &obj->base.dev->struct_mutex)->list))
break;
i915_gem_object_retire__read(obj, engine->id);
@@ -2458,7 +2469,8 @@ i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
for (i = 0; i < I915_NUM_ENGINES; i++) {
struct drm_i915_gem_request *req;
- req = i915_gem_active_peek(&obj->last_read[i]);
+ req = i915_gem_active_peek(&obj->last_read[i],
+ &obj->base.dev->struct_mutex);
if (req == NULL)
continue;
@@ -2534,7 +2546,8 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
for (i = 0; i < I915_NUM_ENGINES; i++) {
struct drm_i915_gem_request *req;
- req = i915_gem_active_get(&obj->last_read[i]);
+ req = i915_gem_active_get(&obj->last_read[i],
+ &obj->base.dev->struct_mutex);
if (req)
requests[n++] = req;
}
@@ -2629,14 +2642,16 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
if (readonly) {
struct drm_i915_gem_request *req;
- req = i915_gem_active_peek(&obj->last_write);
+ req = i915_gem_active_peek(&obj->last_write,
+ &obj->base.dev->struct_mutex);
if (req)
requests[n++] = req;
} else {
for (i = 0; i < I915_NUM_ENGINES; i++) {
struct drm_i915_gem_request *req;
- req = i915_gem_active_peek(&obj->last_read[i]);
+ req = i915_gem_active_peek(&obj->last_read[i],
+ &obj->base.dev->struct_mutex);
if (req)
requests[n++] = req;
}
@@ -3719,11 +3734,13 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
int i;
for (i = 0; i < I915_NUM_ENGINES; i++) {
- req = i915_gem_active_peek(&obj->last_read[i]);
+ req = i915_gem_active_peek(&obj->last_read[i],
+ &obj->base.dev->struct_mutex);
if (req)
args->busy |= 1 << (16 + req->engine->exec_id);
}
- req = i915_gem_active_peek(&obj->last_write);
+ req = i915_gem_active_peek(&obj->last_write,
+ &obj->base.dev->struct_mutex);
if (req)
args->busy |= req->engine->exec_id;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_fence.c b/drivers/gpu/drm/i915/i915_gem_fence.c
index 301344252b18..6c39da8dd6ea 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence.c
@@ -263,7 +263,8 @@ i915_gem_object_wait_fence(struct drm_i915_gem_object *obj)
{
int ret;
- ret = i915_gem_active_wait(&obj->last_fence);
+ ret = i915_gem_active_wait(&obj->last_fence,
+ &obj->base.dev->struct_mutex);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_request.h b/drivers/gpu/drm/i915/i915_gem_request.h
index 56e312b95407..d6b8e801bb93 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.h
+++ b/drivers/gpu/drm/i915/i915_gem_request.h
@@ -290,6 +290,12 @@ i915_gem_active_set(struct i915_gem_active *active,
i915_gem_request_assign(&active->__request, request);
}
+static inline struct drm_i915_gem_request *
+__i915_gem_active_peek(const struct i915_gem_active *active)
+{
+ return active->__request;
+}
+
/**
* i915_gem_active_peek - report the request being monitored
* @active - the active tracker
@@ -299,7 +305,7 @@ i915_gem_active_set(struct i915_gem_active *active,
* caller must hold struct_mutex.
*/
static inline struct drm_i915_gem_request *
-i915_gem_active_peek(const struct i915_gem_active *active)
+i915_gem_active_peek(const struct i915_gem_active *active, struct mutex *mutex)
{
return active->__request;
}
@@ -312,11 +318,11 @@ i915_gem_active_peek(const struct i915_gem_active *active)
* if the active tracker is idle. The caller must hold struct_mutex.
*/
static inline struct drm_i915_gem_request *
-i915_gem_active_get(const struct i915_gem_active *active)
+i915_gem_active_get(const struct i915_gem_active *active, struct mutex *mutex)
{
struct drm_i915_gem_request *request;
- request = i915_gem_active_peek(active);
+ request = i915_gem_active_peek(active, mutex);
if (!request || i915_gem_request_completed(request))
return NULL;
@@ -334,7 +340,7 @@ i915_gem_active_get(const struct i915_gem_active *active)
static inline bool
__i915_gem_active_is_busy(const struct i915_gem_active *active)
{
- return i915_gem_active_peek(active);
+ return __i915_gem_active_peek(active);
}
/**
@@ -346,11 +352,12 @@ __i915_gem_active_is_busy(const struct i915_gem_active *active)
* the caller to hold struct_mutex (but that can be relaxed if desired).
*/
static inline bool
-i915_gem_active_is_idle(const struct i915_gem_active *active)
+i915_gem_active_is_idle(const struct i915_gem_active *active,
+ struct mutex *mutex)
{
struct drm_i915_gem_request *request;
- request = i915_gem_active_peek(active);
+ request = i915_gem_active_peek(active, mutex);
if (!request || i915_gem_request_completed(request))
return true;
@@ -365,11 +372,11 @@ i915_gem_active_is_idle(const struct i915_gem_active *active)
* returning.
*/
static inline int __must_check
-i915_gem_active_wait(const struct i915_gem_active *active)
+i915_gem_active_wait(const struct i915_gem_active *active, struct mutex *mutex)
{
struct drm_i915_gem_request *request;
- request = i915_gem_active_peek(active);
+ request = i915_gem_active_peek(active, mutex);
if (!request)
return 0;
@@ -384,9 +391,10 @@ i915_gem_active_wait(const struct i915_gem_active *active)
* make sure the request is retired before returning.
*/
static inline int __must_check
-i915_gem_active_retire(const struct i915_gem_active *active)
+i915_gem_active_retire(const struct i915_gem_active *active,
+ struct mutex *mutex)
{
- return i915_gem_active_wait(active);
+ return i915_gem_active_wait(active, mutex);
}
/* Convenience functions for peeking at state inside active's request whilst
@@ -394,15 +402,17 @@ i915_gem_active_retire(const struct i915_gem_active *active)
*/
static inline uint32_t
-i915_gem_active_get_seqno(const struct i915_gem_active *active)
+i915_gem_active_get_seqno(const struct i915_gem_active *active,
+ struct mutex *mutex)
{
- return i915_gem_request_get_seqno(i915_gem_active_peek(active));
+ return i915_gem_request_get_seqno(i915_gem_active_peek(active, mutex));
}
static inline struct intel_engine_cs *
-i915_gem_active_get_engine(const struct i915_gem_active *active)
+i915_gem_active_get_engine(const struct i915_gem_active *active,
+ struct mutex *mutex)
{
- return i915_gem_request_get_engine(i915_gem_active_peek(active));
+ return i915_gem_request_get_engine(i915_gem_active_peek(active, mutex));
}
#define for_each_active(mask, idx) \
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 9bc824421b66..326de7eae101 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -242,7 +242,8 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
}
obj->fence_dirty =
- !i915_gem_active_is_idle(&obj->last_fence) ||
+ !i915_gem_active_is_idle(&obj->last_fence,
+ &dev->struct_mutex) ||
obj->fence_reg != I915_FENCE_REG_NONE;
obj->tiling_mode = args->tiling_mode;
diff --git a/drivers/gpu/drm/i915/i915_gem_userptr.c b/drivers/gpu/drm/i915/i915_gem_userptr.c
index d688558606f9..dd6d823ac3e2 100644
--- a/drivers/gpu/drm/i915/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/i915_gem_userptr.c
@@ -74,7 +74,8 @@ static void wait_rendering(struct drm_i915_gem_object *obj)
for (i = 0; i < I915_NUM_ENGINES; i++) {
struct drm_i915_gem_request *req;
- req = i915_gem_active_get(&obj->last_read[i]);
+ req = i915_gem_active_get(&obj->last_read[i],
+ &obj->base.dev->struct_mutex);
if (req)
requests[n++] = req;
}
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 1abcf316a825..1bcdda9680d4 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -740,18 +740,38 @@ unwind:
#define i915_error_ggtt_object_create(dev_priv, src) \
i915_error_object_create((dev_priv), (src), &(dev_priv)->ggtt.base)
+/* The error capture is special as tries to run underneath the normal
+ * locking rules - so we use the raw version of the i915_gem_active lookup.
+ */
+static inline uint32_t
+__active_get_seqno(struct i915_gem_active *active)
+{
+ return i915_gem_request_get_seqno(__i915_gem_active_peek(active));
+}
+
+static inline int
+__active_get_engine_id(struct i915_gem_active *active)
+{
+ struct intel_engine_cs *engine;
+
+ engine = i915_gem_request_get_engine(__i915_gem_active_peek(active));
+ return engine ? engine->id : -1;
+}
+
static void capture_bo(struct drm_i915_error_buffer *err,
struct i915_vma *vma)
{
struct drm_i915_gem_object *obj = vma->obj;
- struct intel_engine_cs *engine;
int i;
err->size = obj->base.size;
err->name = obj->base.name;
+
for (i = 0; i < I915_NUM_ENGINES; i++)
- err->rseqno[i] = i915_gem_active_get_seqno(&obj->last_read[i]);
- err->wseqno = i915_gem_active_get_seqno(&obj->last_write);
+ err->rseqno[i] = __active_get_seqno(&obj->last_read[i]);
+ err->wseqno = __active_get_seqno(&obj->last_write);
+ err->ring = __active_get_engine_id(&obj->last_write);
+
err->gtt_offset = vma->node.start;
err->read_domains = obj->base.read_domains;
err->write_domain = obj->base.write_domain;
@@ -764,9 +784,6 @@ static void capture_bo(struct drm_i915_error_buffer *err,
err->purgeable = obj->madv != I915_MADV_WILLNEED;
err->userptr = obj->userptr.mm != NULL;
err->cache_level = obj->cache_level;
-
- engine = i915_gem_active_get_engine(&obj->last_write);
- err->ring = engine ? engine->id : -1;
}
static u32 capture_active_bo(struct drm_i915_error_buffer *err,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 839c46a007b5..82533f1da54c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11427,7 +11427,8 @@ static bool use_mmio_flip(struct intel_engine_cs *engine,
false))
return true;
else
- return engine != i915_gem_active_get_engine(&obj->last_write);
+ return engine != i915_gem_active_get_engine(&obj->last_write,
+ &obj->base.dev->struct_mutex);
}
static void skl_do_mmio_flip(struct intel_crtc *intel_crtc,
@@ -11727,7 +11728,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
} else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {
engine = &dev_priv->engine[BCS];
} else if (INTEL_INFO(dev)->gen >= 7) {
- engine = i915_gem_active_get_engine(&obj->last_write);
+ engine = i915_gem_active_get_engine(&obj->last_write,
+ &obj->base.dev->struct_mutex);
if (engine == NULL || engine->id != RCS)
engine = &dev_priv->engine[BCS];
} else {
@@ -11748,7 +11750,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
if (mmio_flip) {
INIT_WORK(&work->mmio_work, intel_mmio_flip_work_func);
- work->flip_queued_req = i915_gem_active_get(&obj->last_write);
+ work->flip_queued_req = i915_gem_active_get(&obj->last_write,
+ &obj->base.dev->struct_mutex);
schedule_work(&work->mmio_work);
} else {
request = i915_gem_request_alloc(engine, engine->last_context);
@@ -13970,7 +13973,8 @@ intel_prepare_plane_fb(struct drm_plane *plane,
to_intel_plane_state(new_state);
plane_state->wait_req =
- i915_gem_active_get(&obj->last_write);
+ i915_gem_active_get(&obj->last_write,
+ &obj->base.dev->struct_mutex);
}
i915_gem_track_fb(old_obj, obj, intel_plane->frontbuffer_bit);
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
