On Thu, May 19, 2016 at 03:50:36PM +0300, David Weinehall wrote:
> The atomic version of intel_pre_plane_update did not check
> for HAS_GMCH_DISPLAY before calling intel_set_memory_cxsr().
> While this doesn't cause any issues on its own (it will
> return without doing anything if the hardware doesn't
> have the required feature), the drm_wait_one_vblank() that
> is needed if memory self-refresh is disabled introduces
> an unnecessary delay in the suspend path.
>
> In cases where i915 is on the critical path it means that
> we slow down suspend by 16.8ms on platforms that don't
> need to disable memory self-refresh.
>
> Signed-off-by: David Weinehall <david.weinehall@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 94d28c795e22..542806056cd9 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4644,7 +4644,7 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
> intel_pre_disable_primary(&crtc->base);
> }
>
> - if (pipe_config->disable_cxsr) {
> + if (pipe_config->disable_cxsr && HAS_GMCH_DISPLAY(dev)) {
Might be even better to track the state of cxsr and only wait when it
really changed state. But this looks OK for now.
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> crtc->wm.cxsr_allowed = false;
>
> /*
> --
> 2.8.1
>
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--
Ville Syrjälä
Intel OTC
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