From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> The sink can tell us if link training needs to be performed when exiting PSR main-link off mode. Currently we get that information from the VBT, but at least on my HSW the VBT says one thing, the sink another. And in practice the sink doesn't seem to notice any screen updates unless we do the training. Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_psr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index c073cbbf1b91..4db9c26fb970 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -298,7 +298,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp) else val |= EDP_PSR_TP1_TP2_SEL; - if (!dev_priv->vbt.psr.require_aux_wakeup) + if (!dev_priv->vbt.psr.require_aux_wakeup && + !drm_dp_psr_need_train_on_exit(intel_dp->psr_dpcd)) val |= EDP_PSR_SKIP_AUX_EXIT; I915_WRITE(EDP_PSR_CTL, val); -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
