On Fri, May 27, 2016 at 05:26:58PM +0300, Mika Kuoppala wrote:
> We need this gafs bit to be enabled for hw fix to
> take effect.
>
> References: HSD#2227156, HSD#2227050
> Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++++
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 77f5edc5f915..509238561935 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6084,6 +6084,7 @@ enum skl_disp_power_wells {
>
> #define GEN9_CS_DEBUG_MODE1 _MMIO(0x20ec)
> #define GEN8_CS_CHICKEN1 _MMIO(0x2580)
> +#define GEN8_CS_CHICKEN2 _MMIO(0x2194)
>
> /* GEN7 chicken */
> #define GEN7_COMMON_SLICE_CHICKEN1 _MMIO(0x7010)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index a1488712628b..b7b36c1cfdc3 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1117,6 +1117,9 @@ static int skl_init_workarounds(struct intel_engine_cs *engine)
> GEN7_HALF_SLICE_CHICKEN1,
> GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
>
> + /* WaDisableGafsUnitClkGating:skl */
> + WA_SET_BIT(GEN8_CS_CHICKEN2, (1 << 1));
Name the bit?
> +
> /* WaDisableLSQCROPERFforOCL:skl */
> ret = wa_ring_whitelist_reg(engine, GEN8_L3SQCREG4);
> if (ret)
> @@ -1218,6 +1221,9 @@ static int kbl_init_workarounds(struct intel_engine_cs *engine)
> WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
> GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
>
> + /* WaDisableGafsUnitClkGating:kbl */
> + WA_SET_BIT(GEN8_CS_CHICKEN2, (1 << 1));
> +
> /* WaDisableLSQCROPERFforOCL:kbl */
> ret = wa_ring_whitelist_reg(engine, GEN8_L3SQCREG4);
> if (ret)
> --
> 2.5.0
>
> _______________________________________________
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> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
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