> -----Original Message----- > From: Intel-gfx [mailto:intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf > Of Ander Conselvan de Oliveira > Sent: Friday, May 20, 2016 8:24 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Conselvan De Oliveira, Ander <ander.conselvan.de.oliveira@xxxxxxxxx> > Subject: [PATCH 1/4] drm/i915: Introduce > intel_release_shared_dpll() > > While the details of getting a shared dpll are wrapped by > intel_get_shared_dpll(), the release was still hand rolled into the > modeset code. Fix that by creating an entry point for releasing the > pll and move that code there. > Reviewed-by: Durgadoss R <durgadoss.r@xxxxxxxxx> Thanks, Durga > Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 13 ++-------- > drivers/gpu/drm/i915/intel_dpll_mgr.c | 45 +++++++++++++++++------------ > ------ > drivers/gpu/drm/i915/intel_dpll_mgr.h | 10 ++------ > 3 files changed, 26 insertions(+), 42 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index a500f08..fe9b00c 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -12419,7 +12419,6 @@ static void intel_modeset_clear_plls(struct > drm_atomic_state *state) > { > struct drm_device *dev = state->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_shared_dpll_config *shared_dpll = NULL; > struct drm_crtc *crtc; > struct drm_crtc_state *crtc_state; > int i; > @@ -12429,21 +12428,13 @@ static void intel_modeset_clear_plls(struct > drm_atomic_state *state) > > for_each_crtc_in_state(state, crtc, crtc_state, i) { > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > - struct intel_shared_dpll *old_dpll = > - to_intel_crtc_state(crtc->state)->shared_dpll; > > if (!needs_modeset(crtc_state)) > continue; > > + intel_release_shared_dpll(intel_crtc, > + to_intel_crtc_state(crtc_state)); > to_intel_crtc_state(crtc_state)->shared_dpll = NULL; > - > - if (!old_dpll) > - continue; > - > - if (!shared_dpll) > - shared_dpll = > intel_atomic_get_shared_dpll_state(state); > - > - intel_shared_dpll_config_put(shared_dpll, old_dpll, > intel_crtc); > } > } > > diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c > b/drivers/gpu/drm/i915/intel_dpll_mgr.c > index 0aac3ec..a3293cf 100644 > --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c > @@ -41,28 +41,6 @@ intel_get_shared_dpll_id(struct drm_i915_private > *dev_priv, > return (enum intel_dpll_id) (pll - dev_priv->shared_dplls); > } > > -void > -intel_shared_dpll_config_get(struct intel_shared_dpll_config *config, > - struct intel_shared_dpll *pll, > - struct intel_crtc *crtc) > -{ > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > - enum intel_dpll_id id = intel_get_shared_dpll_id(dev_priv, pll); > - > - config[id].crtc_mask |= 1 << crtc->pipe; > -} > - > -void > -intel_shared_dpll_config_put(struct intel_shared_dpll_config *config, > - struct intel_shared_dpll *pll, > - struct intel_crtc *crtc) > -{ > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > - enum intel_dpll_id id = intel_get_shared_dpll_id(dev_priv, pll); > - > - config[id].crtc_mask &= ~(1 << crtc->pipe); > -} > - > /* For ILK+ */ > void assert_shared_dpll(struct drm_i915_private *dev_priv, > struct intel_shared_dpll *pll, > @@ -247,7 +225,7 @@ intel_reference_shared_dpll(struct intel_shared_dpll > *pll, > DRM_DEBUG_DRIVER("using %s for pipe %c\n", pll->name, > pipe_name(crtc->pipe)); > > - intel_shared_dpll_config_get(shared_dpll, pll, crtc); > + shared_dpll[pll->id].crtc_mask |= 1 << crtc->pipe; > } > > void intel_shared_dpll_commit(struct drm_atomic_state *state) > @@ -1784,3 +1762,24 @@ intel_get_shared_dpll(struct intel_crtc *crtc, > > return dpll_mgr->get_dpll(crtc, crtc_state, encoder); > } > + > +/** > + * intel_release_shared_dpll - releases a shared DPLL from a crtc atomic > state > + * @crtc: crtc > + * @crtc_state: atomic stat for @crtc > + * > + */ > +void intel_release_shared_dpll(struct intel_crtc *crtc, > + struct intel_crtc_state *crtc_state) > +{ > + struct intel_shared_dpll_config *shared_dpll_config; > + struct intel_shared_dpll *dpll = crtc_state->shared_dpll; > + > + if (!dpll) > + return; > + > + shared_dpll_config = > + intel_atomic_get_shared_dpll_state(crtc_state- > >base.state); > + > + shared_dpll_config[dpll->id].crtc_mask &= ~(1 << crtc->pipe); > +} > diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h > b/drivers/gpu/drm/i915/intel_dpll_mgr.h > index 89c5ada..b93eed8 100644 > --- a/drivers/gpu/drm/i915/intel_dpll_mgr.h > +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h > @@ -138,14 +138,6 @@ intel_get_shared_dpll_by_id(struct > drm_i915_private *dev_priv, > enum intel_dpll_id > intel_get_shared_dpll_id(struct drm_i915_private *dev_priv, > struct intel_shared_dpll *pll); > -void > -intel_shared_dpll_config_get(struct intel_shared_dpll_config *config, > - struct intel_shared_dpll *pll, > - struct intel_crtc *crtc); > -void > -intel_shared_dpll_config_put(struct intel_shared_dpll_config *config, > - struct intel_shared_dpll *pll, > - struct intel_crtc *crtc); > void assert_shared_dpll(struct drm_i915_private *dev_priv, > struct intel_shared_dpll *pll, > bool state); > @@ -154,6 +146,8 @@ void assert_shared_dpll(struct drm_i915_private > *dev_priv, > struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc, > struct intel_crtc_state *state, > struct intel_encoder > *encoder); > +void intel_release_shared_dpll(struct intel_crtc *crtc, > + struct intel_crtc_state *crtc_state); > void intel_prepare_shared_dpll(struct intel_crtc *crtc); > void intel_enable_shared_dpll(struct intel_crtc *crtc); > void intel_disable_shared_dpll(struct intel_crtc *crtc); > -- > 2.5.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
