On Tue, May 17, 2016 at 04:19:08AM -0400, Zhi Wang wrote:
> This patch introduces the support of context signle submission. As GVT
> context may come from different guests, which requires different
> configuration of render registers. It can't be combined in a dual ELSP
> submission combo.
>
> We make this function as a context feature in context creation service.
> Only GVT-g will create this kinds of GEM context currently.
>
> v5:
>
> - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko)
>
> Signed-off-by: Zhi Wang <zhi.a.wang@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> drivers/gpu/drm/i915/intel_lrc.c | 15 +++++++++++++++
> 2 files changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 9688006..b8f1e9a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -890,8 +890,8 @@ struct intel_context {
> bool use_48bit_addressing_mode;
> #if IS_ENABLED(CONFIG_DRM_I915_GVT)
> bool enable_status_change_notification;
> + bool single_submission;
> #endif
> -
> struct list_head link;
> };
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 9069836..8d1a9c2 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -455,6 +455,21 @@ static void execlists_context_unqueue(struct intel_engine_cs *engine)
> i915_gem_request_unreference(req0);
> req0 = cursor;
> } else {
> +#if IS_ENABLED(CONFIG_DRM_I915_GVT)
> +
But no ifdefs in code.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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