On Wed, May 18, 2016 at 06:47:16PM +0200, Daniel Vetter wrote:
> Found this while browsing Bspec. Looks like it applies to both skl and
> kbl.
BXT too perhaps. Actually PSR2_CTL says SKL+, but CHICKEN_MISC_1 seems
to say SKL only.
w/a db is having issues it seems, so I can't check if there's anything
relevant there.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Cc: Sonika Jindal <sonika.jindal@xxxxxxxxx>
> Cc: Durgadoss R <durgadoss.r@xxxxxxxxx>
> Cc: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@xxxxxxxxx>
> Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 13 +++++++++++--
> 2 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 0f99e67f2114..c51368744e9e 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6043,6 +6043,7 @@ enum skl_disp_power_wells {
> #define CHICKEN_PAR1_1 _MMIO(0x42080)
> #define DPA_MASK_VBLANK_SRD (1 << 15)
> #define FORCE_ARB_IDLE_PLANES (1 << 14)
> +#define SKL_EDP_PSR_FIX_RDWRAP (1 << 3)
>
> #define _CHICKEN_PIPESL_1_A 0x420b0
> #define _CHICKEN_PIPESL_1_B 0x420b4
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e0d5405a8b15..c583d1de4555 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6845,6 +6845,15 @@ static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv,
> I915_WRITE(GEN7_MISCCPCTL, misccpctl);
> }
>
> +static void skylake_init_clock_gating(struct drm_device *dev)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> +
> + /* See Bspec note for PSR2_CTL bit 31 */
> + I915_WRITE(CHICKEN_PAR1_1,
> + I915_READ(CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP);
> +}
> +
> static void broadwell_init_clock_gating(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -7307,9 +7316,9 @@ static void nop_init_clock_gating(struct drm_device *dev)
> void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
> {
> if (IS_SKYLAKE(dev_priv))
> - dev_priv->display.init_clock_gating = nop_init_clock_gating;
> + dev_priv->display.init_clock_gating = skylake_init_clock_gating;
> else if (IS_KABYLAKE(dev_priv))
> - dev_priv->display.init_clock_gating = nop_init_clock_gating;
> + dev_priv->display.init_clock_gating = skylake_init_clock_gating;
> else if (IS_BROXTON(dev_priv))
> dev_priv->display.init_clock_gating = bxt_init_clock_gating;
> else if (IS_BROADWELL(dev_priv))
> --
> 2.8.1
>
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--
Ville Syrjälä
Intel OTC
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